Joined UEL as Senior Lecturer in Jun 2009. Since 2006 have been working with Sepura plc. Cambridge UK, as a Senior Technologist, working on developing new technologies, algorithms and standards relevant to future product development for TETRA mobile radios. As a member of the ETSI Technical Committee on Reconfigurable Radio Systems (RRS) working towards formulating ETSI standards for Software Defined (SDR)/Cognitive Radios (CR) and Networks. Prior to joining Sepura was with the Navy from 1989 in various roles in engineering, research and management mainly pertaining to Radar & EW systems. Have biographical record in Who’s Who in the World 2009, 26th – Edition. A Fellow of the Higher Education Academy (HEA) and a  Senior Member IEEE.

Teaching & undertaking research in wireless & signal processing.

Design of reconfigurable baseband receivers, delta-sigma modulators and standardization activities related to cognitive radios and software defined radios.

1. ETSI Standardization of Software Defined Radio (SDR) and Cognitive Radio (CR).

The European Telecommunication Standardization Institute (ETSI) Technical Committee (TC) on Reconfigurable Radio Systems (RRS) is mandated to produce normative standards in field of Software Defined Radio (SDR) and Cognitive Radio (CR). Being a TC RRS working group-2 (WG2) member have focussed on SDR technology for radio equipment architecture and proposals for common reference architectures of SDR/CR radio equipments (mobile handsets, radio base stations) and related interfaces. WG2 has identified following candidate interfaces for standardization:

• Multi-radio Interface (MI).
• Unified Radio Application Interface (URAI).
• Radio Programming Interface (RPI).
• Interface to the Reconfigurable RF Transceiver.

Of the above the MI, URAI and RPI are well defined in the work undertaken by WG2, however details of interface to the reconfigurable RF transceiver have not yet been formulated.   Although the ultimate single universal RF circuitry is out of reach, a RRS providing a number of RF circuits for different radio technologies would benefit from a more harmonized (virtual) interface to reconfigure and use such set of hardware peripherals. An interface to the reconfigurable RF transceiver inside the URAI has been identified for future work. In addition ETSI RRS is performing work that is complementary to the IEEE SCC41 and IEEE 802 activities. Following research are pursued further for formulating ETSI standards as a WG2 member of TC RRS:

• ETSI standardization of identified interfaces MI, URA and RPI.
• Definition/functioning of interface to the reconfigurable RF transceiver to enable standardization.
• Focus on SDR standards beyond the IEEE scope, SDR/CR standards addressing the specific needs of the European Regulatory Framework.
• SDR/CR TV White Space standards adapted to the digital TV signal characteristics in Europe.

2. Design of higher-order continuous-time (CT) undersampling delta-sigma (Δ-Σ) modulators for radio-frequency (RF) analog-to-digital (A/D) conversion.

Aim is to develop and implement designs of higher-order continuous-time (CT) undersampling Δ-Σ modulators for analog-to-digital (A/D) conversion of radio-frequency (RF) carrier signals. The next generation mobile station (MS) receiver would have a reconfigurable architecture in order to support multiple Radio Access Technologies (RATs) viz., GSM, UMTS (W-CDMA), CDMA 2000, WiMAX and LTE. Multiple RATs can be supported if most of the receiver including the analog mixer/IF stage is digitized and is reconfigurable. Feasibility of such reconfigurable architectures would require A/D conversion to be performed directly on the RF carrier signal. As a cognitive radio (CR) offers increased level of spectral efficiency and improved overall system capacity exploitation, quite possibly the later 4th-generation (4G) systems and certainly beyond 4G would be CR. Software defined radio (SDR) is the “enabling technology” that would introduce the required level of flexibility that would “enable” a MS to function as a CR. The research would offer practical solutions for low-power RF A/D conversion which is one of the key enablers in implementing designs of next generation reconfigurable/SDR mobile station receivers, the others being wide-band antennas, steerable antennas and deep sub-micron semiconductor technology. RF A/D conversion presently is a bottleneck in implementing reconfigurable designs especially for mobile platforms due to limitations in the power budget. The research would address the issues of low-power, multiple RATs and sufficient dynamic ranges by offering design solutions that are practical for hardware implementation.

3. Accurate stability prediction of higher-order delta-sigma (Δ-Σ) modulators for multiple sinusoid and OFDM signals.

The present approaches on predicting stability of Delta-Sigma (Δ-Σ) modulators are mostly confined to DC inputs. This poses limitations as practical applications of Δ-Σ modulators involve a wide range of signals other than DC such as multiple sinusoids for speech modeling. A quasi-linear model for Δ-Σ modulators with nonlinear feedback control analysis that accurately predicts stability of single-loop 1-bit higher-order Δ-Σ modulators for multiple sinusoids would enable optimization of the design of higher-order single-loop Δ-Σ modulators with increased dynamic ranges for various applications that require multiple sinusoidal inputs or any general input composed of a finite number of sinusoidal components. This would find use for optimizing Δ-Σ modulator based DACs in speech codecs. The research would be extending for OFDM for wireless applications and to multi-bit quantizers.

• MSc Mobile Communications
• MSc Computer Systems Engineering

• Digital Signal Processing
• Computer Communications

Industrial projects

1. ETSI Standardization of SDR and CR.

Since 2006 have been a European Telecommunications Standards Institute (ETSI) Technical Committee (TC) member for Reconfigurable Radio Systems, to study the feasibility of standardization activities related to cognitive radio research. Working group member of the radio systems architecture group, responsible for standardization of handsets architectures of cognitive /SD radios.

2. Developing new technologies, standards and algorithms relevant to future product development for the next generation TETRA-2 OFDM mobile station.

Design and development of the basband port and delta-sigma ADC, DAC designs for the TETRA-2 mobile station. Algorithms developed include auto-gain control (AGC), algorithm enhancement of the Reed Muller Header coder and timing estimation for frame synchronization. Algorithm optimization for hardware/software portioning.

3. Naval Electronic Warfare systems

Acceptance of design reviews and user trials presented by multidisciplinary teams at Defence labs for EW systems being developed for the Navy.

Publications

Journals

• Mueck, M., Piipponen, A., Lota, J., et al, ‘ETSI reconfigurable radio systems- status and future directions on software defined radio and cognitive radio standards’, IEEE Communications Magazine, vol. 48, issue 9, Sep 2010, pp.78-86.
• Lota, J., Al-Janabi, M., and Kale, I., ‘Nonlinear stability analysis of higher-order Δ-Σ modulators for DC and sinusoidal inputs,’ IEEE Trans. on Instrumentation & Measurements, vol.57, no.3, Mar 2008, pp. 530-542.

Conferences

• Lota, J., ‘Design of a delta-sigma (Δ-Σ) based digital-to-analog converter for TETRA-2 transmitter,’ Proc. IEEE International Instrumentation & Measurements Technology Conference I2MTC-2010, Austin, Texas, USA, 03-06 May 2010.
• Lota, J., Al-Janabi, M., and Kale, I., ‘System & circuit level design & analysis of a 16-bit Δ-Σ ADC for a OFDM based TETRA-2 network mobile station application’ Proc. IEEE Instrumentation & Measurements Technology Conference-IMTC 2008, Vancouver, Canada, May 2008.
• Lota, J., Al-Janabi, M., and Kale, I., ‘Tonality of Δ-Σ  modulators: A psychoacoustics model based approach’, Proc. IEEE Int. Symp. Circuits & System- ISCAS 2007, New Orleans, USA, May 2007. 
• Lota, J., Al-Janabi, M., Kale, I., ‘Stability analysis of higher-order Δ-Σ modulators for dual-sinusoidal inputs,’ Proc. IEEE Instrumentation & Measurements Technology Conference -IMTC 2007, Warsaw, Poland, May 2007.
• Lota, J.,  Al-Janabi, M., and Kale, I., ‘Stability analysis of higher-order Δ-Σ modulators based on describing function method,’ Proc. IEEE International Symposium on Circuits & Systems -ISCAS 2006, Kos, Greece, May 2006. 
• Lota, J., Al-Janabi, M., and Kale, I., ‘A study on the effects of accumulated & independent clock jitter on discrete-time Δ-Σ modulators,’ Proc. IEEE Instrumentation & Measurements Technology Conference -IMTC 2005, Ottawa, Canada, May 2005.

All the papers can be downloaded from institutional repository of the University of East London available at http://dspace.uel.ac.uk/jspui/

• Fellow HEA
• Senior Member IEEE
• Member IEEE Circuits & Systems  Society
• Peer review papers for publication in the IEEE Transactions on Circuits & Systems-I, IEEE Communications Magazine.